Hardware implementation of a pipelined computational unit for N-body simulation

  • Ovidiu Panait "Dunarea de Jos" University of Galati
Keywords: FPGA, pipeline, N-body simulation, floating point, reconfigurable platform

Abstract

This paper presents a pipelined FPGA implementation of an engine that computes Newtonian gravitational forces. The module can be incorporated in a large-scale N-body simulation as the primary component used for computing the interaction between bodies. It uses 64-bit floating point arithmetic and relies on the speed provided by the “Fast Inverse Square” root algorithm. The design was implemented and tested on an Altera DE10-Lite FPGA.

Downloads

Download data is not yet available.
Published
2018-06-01
How to Cite
1.
Panait O. Hardware implementation of a pipelined computational unit for N-body simulation. The Annals of “Dunarea de Jos“ University of Galati. Fascicle III, Electrotechnics, Electronics, Automatic Control, Informatics [Internet]. 1Jun.2018 [cited 15Jan.2025];41(1):28-1. Available from: https://gup.ugal.ro/ugaljournals/index.php/eeaci/article/view/278
Section
Articles