Power Estimation of Pipeline FFT Processors

S. Reza Talebiyan; Saied Hosseini-Khayat

Power Estimation of Pipeline FFT Processors

S. Reza Talebiyan Ferdowsi University of Mashhad
Saied Hosseini-Khayat Ferdowsi University of Mashhad

Keywords: Pipeline FFT processor, power analysis, utilization rate, clock-gating

Abstract

Pipeline FFT processors are used in mobile communication systems and in particular in OFDM-based systems. This paper presents a method for power analysis of pipeline FFT processors. This method applies to various architectures with different radices. It also presents a method for mapping utilization rate onto clock-gating, which results in efficient power consumption.

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Published

2009-06-30

How to Cite

Talebiyan S, Hosseini-Khayat S. Power Estimation of Pipeline FFT Processors. The Annals of “Dunarea de Jos“ University of Galati. Fascicle III, Electrotechnics, Electronics, Automatic Control, Informatics [Internet]. 30Jun.2009 [cited 3Apr.2025];32(1):37-1. Available from: https://gup.ugal.ro/ugaljournals/index.php/eeaci/article/view/625

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Issue

Vol 32 No 1 (2009)

Section

Articles

@ "Dunarea de Jos" University of Galati